Fall 2012 - Electrical And Computer Engineering: Fill & Download for Free

Here are some actual statistics from the University of Illinois at Urbana-Champaign, all mined from public university data. tl:dr: Maybe computer engineering, depending on what you count, but nothing else.Computer engineering is currently the largest major on campus, thanks to significant growth:434 majors in 2007 (not in top 20)697 majors in 2012 (#10)1270 majors in 2017 (#1)Psychology has consistently been either the first of second most popular major at Illinois for at least the last decade, but the number of majors has dropped slightly over the last decade:1314 majors in 2007 (#1)1203 majors in 2012 (#1)1187 majors in 2017 (#2)Computer science at UIUC is complicated, because it’s split across a total of nine different undergraduate majors. The largest CS major, in the college of engineering, is currently the third largest major on campus.592 majors in 2007 (#12)945 majors in 2012 (#5)1045 majors in 2017 (#3)However, all nine CS majors combined would be the largest major on campus by a significant margin. All CS majors take the same required lower-division courses—the differences are only in the upper-division electives—so I think it’s fair to count them together, but not everyone agrees.710 majors in 2007 (would be #10)1051 majors in 2012 (would be #3)1728 majors in 2017 (would be #1)No other major on campus is seeing the same growth. Other traditionally popular majors have either stayed flat or fallen. For example, electrical engineering saw an increase several years ago but has since declined slightly:767 majors in 2007 (#8)1163 majors in 2012 (#2)1025 majors in 2017 (#4)Mechanical engineering is flat:845 majors in 2007 (#6)814 majors in 2012 (#6)859 majors in 2017 (#9)Political science majors have dropped:1047 majors in 2007 (#2)616 majors in 2012 (#13)568 majors in 2017 (#16)Finally, English majors have plummeted:779 majors in 2007 (#7)428 majors in 2012 (not in top 20)326 majors in 2017 (not in top 20)But number of majors is not the only measure of popularity. The Engineering CS major receives at least twice as many applications for freshman admission as any other major on campus. In particular, the CS engineering major received almost four times as many applications as computer engineering for Fall 2018 admissions. (ECE has more faculty than CS, and CE majors take a significant fraction of their courses from CS instead of their own department.) Moreover, CS applications have consistently grown by at least 10% per year for at least six years; over the same time period, CE applications have seen much more modest growth (2–3% per year), and other majors in engineering have been flat.

MS positions tend to be self-funded, but the chances of getting a TA/RA vary significantly by school. For example, it is possible that you get admitted to Stanford's MS program, which is very large, but leaves little chance for financial aid (if only because there are so many people there and relatively few research labs). You have better chances at a large public school - Berkeley, Michigan, UIUC and, perhaps, UCLA. They teach large undergraduate courses and employ a number of teaching assistants. Also, Michigan experienced so much growth in the last 10 years (in terms of research labs, projects, and undergraduate enrollment) that we often cannot staff TA and RA positions entirely with PhD students.With an eye on possible TA positions, make sure your recommenders are articulate and can comment on your communication skills, as well as broad knowledge.If you aim at a particular university, you can read up about specific projects and express interest in them in your SOP. On the other hand, I would rather see a student's grades in our courses before I offer them an RA position.To give you some examples. In the Winter 2013 semester I gave an RA position to an MS student, and he had a paper accepted at a major conference out of this work. In Fall 2012, he earned an A+ in an important course, and the instructor offered him a TA position for Fall 2013, which he accepted to gain a broader experience (but may continue research with me at a slower pace). This coming semester, I will support a different MS student on that project.Hope this info is helpful.

See Choosing a Graduate Program in VLSI Design & Related Areas: Things to ConsiderAll other responses to this question till date is a joke.Seriously, read my post: Choosing a Graduate Program in VLSI Design & Related Areas: Things to Consider by Pasquale Ferrara on Electrical Engineering + Computer Science (EECS).And, ask yourself if you realize that IEEE International Solid-State Circuits Conference (ISSCC) and IEEE International Symposium on Circuits and Systems (ISCAS) are the top conferences in IC design.Next, determine which universities publish papers at ISSCC and ISCAS more often than the others. And, determine which IC designs are of better quality, and lead to best paper awards in relevant IEEE journals for IC design.When you do this, you can empirically determine the top universities for graduate research in IC design.If you do not believe my claim that ISSCC and ISCAS are the top conferences in VLSI design, you can come up with your own ranking by doing a literature review of 1-3 research topic(s) in IC design. You can even be more specific for a subtopic, such as asynchronous VLSI design, synchronous elastic VLSI systems, digitally-assisted analog design, and subthreshold IC design. See Pasquale Ferrara's answer to How do I find the seminal papers of an academic field? to help you do the literature review.To help you save time, while visiting web pages of professors and their labs, check out the department web pages to look at the quality (depth) of the graduate classes that they offer in VLSI design (or whatever area you wanna work in). If they number from 3-5, it is okay. If it is less than 3, don't apply there. If it is >6, you should be fine there.The breadth and depth of classes in IC design (and related areas) is an important consideration in applying to graduate programs in ECE to seek a career in IC design (and related areas), but it is hard to rank them based on the quality of teaching, for professors (including adjunct/teaching faculty) and teaching assistants (yes, bad TAs can mess up your grade). Likewise, it is hard to rank them based on the depth of the classes, even if you have access to the syllabus (and obtained information about class projects from recent semesters). Some universities have 3-5 professors teaching introductory VLSI design classes. A professor teaching EE XYZ Introductory VLSI Design at ABC university in Fall 2015 may be different from the professor teaching it in Spring 2016. In Fall 2016, yet another professor may be teaching it. TAs for a given class can vary, too. Furthermore, some professor vary the content when they teach a given class, say EE ASD.Some classes are offered only in Fall. Some other classes are offered once in 3 years, or never again. So, beware of that.Basically, you can easily determine the research quality and productivity of a graduate program in electrical and computer engineering (and computer science). However, determining the quality and scope of coursework is very subjective and hard.Look at the Carnegie Classification of Institutions of Higher Education: Carnegie Classification of Institutions of Higher EducationU.S. research universities with very high research activity (RU/VH) do offer Masters degree (MS) programs in electrical (and computer) engineering (EE/CE/ECE), or in computer science (and engineering) (CS/CSE) -- or, in electrical engineering and computer science (EECS) -- that include a bunch of classes in VLSI/IC design, and related areas such as electronic design automation (EDA) and embedded systems. Generally, they do not offer a MS in VLSI design, but may offer a MS EE/ECE/EECS/CS program with an emphasis/concentration in VLSI.For historical reasons, digital VLSI design is included in some CS departments, since many top-notch CS researchers (including those in theoretical CS) would do research in digital VLSI design and EDA during the golden era of digital VLSI design or the "Age of Heroes" (late 1970s till early 1990s) for EDA (see Prof. Alberto Sangiovanni-Vincentelli's talks at ICCAD 2012 and DAC 2003, and associated IEEE magazine/journal articles).Here, MS programs in such U.S. universities will easily trump Masters degree programs elsewhere, including those in Europe, Asia, and Canada. You will easily find a MS program with 3-8+ classes in digital VLSI design as well as analog/RF and mixed-signal design. This may cover special topics, such as VLSI implementations of signal processing or computer vision algorithms, analog/RF testing, high-speed interconnect design (at 100 GHz)... These classes are offered in addition to typical advance VLSI design topics, such as asynchronous VLSI design, VLSI design for manufacturability (DFM), VLSI architecture, network-on-chip (NoC) design (or on-chip communication networks), and RFIC design. Here, I consider classes in processor design (including TLM and RTL implementations of processors) to be classes in computer architecture (including advanced classes in microarchitecture).These do not include classes in nanoelectronics, device physics (solid-state physics) and device engineering, semiconductor manufacturing (which allows you to fabricate your own chip and produce your own wafer), and MEMS design and manufacturing.In EDA, you can typically find classes in physical design, logic synthesis and verification (e.g., logic simulation, static timing analysis, and formal verification via model checking), and VLSI testing. Some programs may include classes that cover high-level synthesis or other topics.In embedded systems, the focus tends to lean towards transaction-level modeling (TLM) via SystemC-TLM, hardware/software co-design and co-verification, cyber-physical systems (CPS), and formal methods/verification.Here, I have excluded classes in other fields, such as biomedical engineering, which may offer a neural implant engineering (or neural prostheses) class that allow you to design an analog circuit modeling the function of a artificial neuron (to stimulate the real neurons in the retina of blind patients by converting light energy into electrical pulses) as a class project.Since you would typically need 90% to get an "A" and 80% to get a "B" in the U.S., and each graduate systems EE/ECE/CE/EECS/CS/CSE class may involve 2-4 medium/"big" projects (e.g., a Viterbi decoder + SRAM + 32-bit processor) on top of regular assignments, midterms (mid-semester quizzes/tests/exams), and finals (final examination), you will learn a lot more in the U.S. (for 3 10-week quarters or 2 15-week semesters) than elsewhere. There is no doubt about that.An aside: WARNING!!! ECE/EE/EECS professors in digital VLSI design, analog/RF and mixed-signal (AMS/RF) design, and device engineering will assume that you know your basics very well. They include: logic design; analog circuit design; engineering mathematics (vector calculus, differential equations, linear algebra, and probability + statistics); working knowledge of UNIX -- Can you work in a UNIX environment (e.g., with GNU/Linux or Oracle Solaris)?; and computer programming (including writing scripts in Tcl/Perl to "drive" your EDA or VLSI CAD tools).As for programs in Europe, you can find decent programs that will have classes to train you in the basic material but not in the advanced VLSI material. However, a decent Masters thesis can get you up to par on a topic, as oppose to several topics in the U.S. via advanced graduate systems classes and a Masters thesis; here, you would want to avoid theory/theoretical/seminar classes that do not involve projects. This is because when you interview for positions (internships or R&D positions), they care far more about your skills and project experience, rather than what you can regurgitate in an interview. Your interviews, especially for R&D positions in VLSI design or EDA software development, will be oral examinations. So, you do have to revise what you learned in class and elsewhere for these interviews... E.g., you will be given a circuit and you would have to analyze it. Or, you will be asked to determine the delay/stuck-at-value faults of that circuit, or if hold/setup time constraints are violated. Your interviewers may be Ph.D.s with extensive experience in a given topic/sub-topic, such as cache design or high-speed interconnect design. So, you can forget about winging your way out of technical on-site interviews, which may include several (e.g., 3-6) rounds of 30-60 minute interviews.Therefore, you would not be able to find a class on "sequential equivalence checking," which is only offered at Berkeley, or equivalent outside the U.S.. Once again, you can find the grading policies and course syllabi of graduate classes for the aforementioned topics in various web pages of VLSI classes at U.S. research universities and their "peers" elsewhere, and validate my claims.Remember to take classes outside of VLSI design to broaden your perspective on things (e.g., computer vision, statistical signal processing, neural prostheses, microarchitecture, (real-time) operating systems, or adaptive control systems), and to lighten your workload (e.g., engineering/tech management and intellectual property law).Basically, do your homework!See Pasquale Ferrara's answer to What would be some of the things that one should not miss, especially as an international student, while pursuing a masters degree in Computer Science? and Pasquale Ferrara's answer to Why do people prefer US for masters?. Also, see Pasquale Ferrara's answer to When recruiting Software Engineer/Computer Science majors for US companies, what international universities are on par with MIT/Stanford?.Also, see Graduate School and EECS (ECE + CS).Some research universities would be obviously suggested, assuming if you have taken sufficiently rigorous classes in VLSI design (or, at least in logic design).This is because you probably had to google for stuff, chance upon helpful web pages from VLSI design (or logic design) classes from other universities, and skim through various books.By comparing your class with those that you have seen, you can quickly determine the quality of certain institutions. E.g., Mr. Dan Zhang's legendary description of his VLSI design class at the University of Michigan is so awesome that you know that the EECS program at Michigan is world-class. See Dan Zhang's answer to Computer Architecture: I have admits in MS in ECE from Wisconsin-Madison, Michigan-Ann Arbor and Carnegie Mellon. Which one among these would be the best pick for good coursework and jobs in computer architecture and digital VLSI design?